AI data center supply chain shifts toward custom chips

The AI data center market is mapped across 10 value chain layers and 52 companies, spanning GPU makers, CPU architectures, ASIC co-designers, startups, server OEMs, interconnect vendors, cloud providers, and private infrastructure operators. The total addressable market is projected to grow from $242B in 2025 to $1.2T by 2030, while NVIDIA’s AI accelerator revenue share is estimated at ~75-81% in H1 2026 after an 86% position in 2024.

Hyperscalers are pushing vertical integration after spending ~$410B on capex in 2025 and guiding ~$700B+ for 2026. Amazon, Google, Meta, and Microsoft are building custom chips such as TPU, Trainium, Maia, and MTIA, which are described as offering 40-65% TCO advantages over GPUs at scale. Broadcom and Marvell control ~95% of the custom ASIC co-design market, with Google spending ~$8B/year with Broadcom on TPU development.

NVIDIA is responding by shifting from chips toward complete systems. DGX Pod, SuperPod, Vera Rubin, and NVLink Fusion keep NVIDIA embedded in rack architecture by allowing custom ASICs to connect to its systems, even when NVIDIA is not the primary compute chip.

Infrastructure constraints are broadening beyond compute. ARM CPUs have grown from 5% to ~20% of data center server share since 2020, supported by 30-60% energy efficiency gains, while cables and optical links are emerging as bottlenecks. AI racks require 10-36x more fiber than traditional setups, DAC/AOC lead times exceed 20 weeks, and the $2.7B interconnect market is projected to reach $10.7B by 2034.