Panmnesia samples first PCIe 6.0/CXL 3.2 fabric switch for AI infrastructure

Panmnesia, a pioneer in Artificial Intelligence infrastructure link solutions, announced sample availability of its PCIe 6.0/CXL 3.2 fabric switch, which the company says is the industry first CXL switch silicon to support port-based routing. Panmnesia is distributing switch silicon samples to early access partners as part of the roll out. The announcement positions the device as a new option for system builders and vendors working on next generation interconnects for data center workloads.

The switch is described as a hybrid solution that implements both PCIe Gen 6 and CXL 3.2 protocols on a single chip while maintaining full backward compatibility with all previous PCIe and CXL generations. According to Panmnesia, the implementation follows the CXL 3.2 and PCIe 6.0 specifications strictly, which the company says ensures standards compliance. The single-chip approach aims to simplify platform design by handling multiple interconnect protocols in one device.

In addition to supporting standard routing, the fabric switch can operate in port-based routing mode and hierarchy-based routing mode, giving designers flexibility in how devices are interconnected. Panmnesia emphasizes complete interoperability across all subprotocols as a key feature, noting that the silicon is fully implemented in accordance with the relevant specifications. The company is moving samples to early partners to validate real-world interoperability and integration with existing server and accelerator ecosystems.