Intel 18A in Panther Lake nears TSMC N3E density

SemiAnalysis’ teardown of Intel’s Panther Lake (Core Ultra 7 365) offers a rare view of 18A in a shipping processor. The 18A compute logic was found to be similar in density to the TSMC N3E logic used in the 12-core Xe3 GPU tile, while a representative-cell model put it about 18.6% denser than Intel 3 GPU logic.

The findings still leave 18A behind TSMC N3P, N2, and Samsung SF2 in peak density, with whole-die density dependent on cell mix and placement. Panther Lake is Intel’s first chip with RibbonFET gate-all-around transistors and the first commercial use of PowerVia backside power delivery, with four stacked ribbons per transistor versus three sheets on Samsung’s SF2. The Cougar Cove P-core occupies roughly the same area as Lunar Lake’s Lion Cove despite L2 growing from 2.5 MiB to 3 MiB. Panther Lake’s NPU 5 is said to use 36.9% less chip area than Lunar Lake’s NPU 4 while keeping the same number of INT8 MAC units, and the CPU cores are characterized as incremental updates.