NVIDIA shifts HBM controller into memory stack

NVIDIA has introduced NVHBM, a custom high-bandwidth memory design that places the memory controller in the HBM base die instead of on the compute die. The company plans to use the technology in future GPUs and make it available to third-party XPU customers through NVLink Fusion.

By moving the controller into the 3D HBM stack, NVHBM is designed to reduce the amount of compute-die area dedicated to memory management. Compared with standard HBM4E, NVIDIA claims the approach can deliver up to 30% more memory bandwidth, 15% lower HBM power consumption, and up to 25% more usable compute die area on the processing unit.

The design also changes the physical memory interface. NVIDIA says the custom NVHBM PHY reduces I/O area by up to 67% compared with JEDEC HBM4E, while the narrower interface simplifies interposer routing and frees up to 80% more usable silicon across the layout.